BIAS=FAST
D/A Converter Register. This register contains the digital value to be converted to analog and a power control bit.
| RESERVED | Reserved. Read value is undefined, only zero should be written. |
| VALUE | After the selected settling time after this field is written with a new VALUE, the voltage on the DAC_OUT pin (with respect to VSSA) is VALUE x ((VREFP - V REFN)/1024) + VREFN. |
| BIAS | Settling time The settling times noted in the description of the BIAS bit are valid for a capacitance load on the DAC_OUT pin not exceeding 100 pF. A load impedance value greater than that value will cause settling time longer than the specified time. One or more graphs of load impedance vs. settling time will be included in the final data sheet. 0 (FAST): The settling time of the DAC is 1 us max, and the maximum current is 700 uA. This allows a maximum update rate of 1 MHz. 1 (SLOW): The settling time of the DAC is 2.5 us and the maximum current is 350 uA. This allows a maximum update rate of 400 kHz. |
| RESERVED | Reserved. Read value is undefined, only zero should be written. |